In the computer art busses made up of a number of paths are used to provide communication connections between equipment connected to a bus. More particularly, there are data, address and control leads that make up a bus. Equipment such as random access memory (RAM), floppy disks, processors, video controllers and other devices typically found in a computer system are connected to the bus. Through a priority scheme ones of the devices requesting access to another device are granted access to the bus. For a simple example, if the processor wants to access the RAM memory to read data therefrom, it first requests and is granted access to the bus. The processor places an identity code of the RAM on some of the control leads and information indicating that a read operation is to be performed on other control leads. The addresses of the locations in the RAM to be read out are sequentially placed on the address leads of the bus, and the data read out of the RAM is returned to the processor via the data leads. When the processor is finished reading and possibly writing the RAM, it relinquishes control of the bus for use by other devices connected thereto.
In some computer system configurations, such as the popular personal computers, there is only one bus. In some of these personal computers there are eight data leads as part of the bus, while in other personal computers there are sixteen data leads, and yet in other personal computers there are thirty-two data leads.
In other computer system configurations there are more than one bus. This permits more than one operation to be simultaneously performed via the multiple busses. Interfaces are often provided between the busses which also permits a circuit connected to one of the busses to be connected to a different circuit connected to another bus when necessary. To facilitate these interbus connections, each of the busses typically have the same data path, control path and address path sizes.
Typically, in the prior art, devices request access to a processor by providing an interrupt signal to one of the interrupt inputs of the processor. When the number of requesting devices gets large, there may not be enough interrupt ports to the processor and, in addition, the processor must spend more time arbitrating between interrupt requests. This is intolerable. Thus, there is a need in the art for bus interface interrupt apparatus that can arbitrate interrupt requests from a larger number of sources and from more sources than there are interrupt ports to the processor, and thereby reduce the time required for the processor to do same.
In a few instances the multiple busses within some computer systems have different bit size data paths. This creates problems in interfacing the different busses. Thus, there is a need in the art for bus interface interrupt apparatus that can connect computer busses having different bit size data paths and thereby permits communication between more devices. There is also a need for bus interface interrupt apparatus that is simple and operates with the busses in the same manner as other prior art devices connected thereto.